VLSI PROJECT TITLES

 VLSI 13-14

S.NO	PROJECT TITLE	YEAR
1	Error Rate-Based Wear-Leveling for NAND Flash Memory at Highly Scaled Technology Nodes	2013
2	Fault-Tolerant Embedded-Memory Strategy for Baseband Signal Processing Systems	2013
3	Block-Circulant  RS-LDPC Code: Code Construction and Efficient Decoder Design	2013
4	Design of Testable Reversible Sequential Circuits	2013
5	Reduced Power Transition Fault Test Sets for Circuits With Independent Scan Chain Modes	2013
6	Circuit-Level Timing Error Tolerance for Low-Power DSP Filters and Transforms	2013
7	MDC FFT/IFFT Processor With Variable Length for MIMO-OFDM Systems	2013
8	Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator	2013
9	Hardware Variability-Aware Duty Cycling for Embedded Sensors	2013
10	Efficient Implementation of Reconfigurable Warped Digital Filters With Variable Low-Pass, High-Pass, Band pass, and Band stop Responses	2013
11	Computation On Stochastic Bit Streams Digital Image Processing Case Studies	2013
12	Fast Sift Design For Real-Time Visual Feature Extraction	2013
13	Logic-Based Implementation Of Color Image Processing Techniques In FPGA Fuzzy	2013
14	Algorithm And Architecture Design Of Bandwidth-Oriented Motion Estimation For Real-Time Mobile Video Applications	2013
15	Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic	2013
16	Sub-1-V Fast-Response Hysteresis-Controlled CMOS Buck Converter Using Adaptive Ramp Techniques	2013
17	Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops	2013
18	Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool	2013
19	Automatic Test Program Generation Using Executing-Trace-Based Constraint Extraction for Embedded Processors	2013
20	Area delay efficient binary adders in QCA	2013
21	Parallel AES Encryption Engines for Many Core Processor Arrays	2013
22	Low-Complexity Multiplier For GF(2m) Based on All-One Polynomials	2013
23	Low-power, High-Throughput, and Low-Area Adaptive FIR Filter Based on Distributed Arithmetic	2013
24	Hardware Implementation of a modified randomized cryptographic algorithm	2013
25	Evaluation of the Convention Vs Ancient Computation methodology for Energy Efficient Arithmetic Architecture	2013
26	A low-power, Area Efficient Design Technique for Wide Fan-in Domino Logic Based Comparators	2013
27	Reduced Complexity LCC Reed-Solomon Decoder Based on Unified Syndrome Computation	2013
28	Gate Mapping Automation For Asynchronous NULL Convention Logic Circuits	2013
29	High Accuracy Fixed-width Modified Booth multipliers for Lossy Applications	2012
30	Efficient Majority Logic Fault Detection With Difference-Set Codes for Memory Applications	2012
31	An efficient TCAM-based implementation of multi pattern matching using covered state encoding	2012
32	Block recombination approach for sub quadratic space complexity binary field multiplication based on Toeplitz matrix-vector product	2012
33	High speed architectures for multiplication using reordered normal basis	2012
34	FFT implementation with fused floating point operations	2012
35	Efficient majority logic fault detection with difference set codes for memory applications	2012