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VLSI PROJECT TITLE 2014 FOR M.E/M.TECH

VLSI PROJECT TITLE 2014-15

1.      Logical Effort for CMOS-Based Dual Mode Logic Gates
2.      Design of a Low-Voltage Low-Dropout Regulator
3.      Efficient Register Renaming and Recovery for High-Performance Processors
4.      System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3-D MP-SOCs
5.      A Method to Extend Orthogonal Latin Square Codes

6.      Partial Access Mode: New Method for Reducing Power Consumption of Dynamic Random Access Memory
Location: Tamil Nadu, India

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